Numerous approaches have been used for the scanned inspection and detection of errors or defects in printed circuit boards and other systems, including matching scanned images with "template" standard patterns, and, more recently, image shape learning and comparison, as in U.S. Pat. Nos. 4,589,140 and 4,893,346, all originally issued to the common assignee of the present invention. While most useful for such purposes, there are applications, as in the before-mentioned wafer, reticle and similar devices, where somewhat less complicated and less costly techniques are desirable, including with advantages of total independence of feature orientation and, if desired, the checking for missing features, as well.
While the art has been well familiar with in-line inspection technologies including the use of image expansion and contraction techniques as taught, for example, in U.S. Pat. No. 4,443,855 of said common assignee, it has, however, not apparently earlier been discovered that imparting a novel type of sequence of intelligence to the image shrinking and expansion process can produce the discovery underlying the present invention of solving the above-mentioned and related problems.